A DRAM (dynamic random access memory) includes an array of DRAM cells arrayed into a matrix of rows and columns. In a typical DRAM array, the DRAM cells disposed along a column are coupled to the same bit-line, and the DRAM cells disposed along a row are coupled to the same word-line.
Each DRAM cell includes a switching transistor and a storage capacitor coupled with the switching transistor. The switching transistor can be an NMOSFET (N-channel metal oxide semiconductor field effect transistor). In a DRAM with NMOSFETs, the gate of the NMOSFET is coupled to a word-line, the drain of the NMOSFET is coupled to a bit line that can be coupled to a sense amplifier, the source of the NMOSFET is coupled to a node of the storage capacitor, and another node of the storage capacitor is coupled to a ground node.
The voltage across a storage capacitor determines the logical level of the DRAM cell. Due to the capacitance of parasitic capacitors, a storage capacitor with increased capacitance is needed to provide sufficient voltage signal. To this end, the electrodes of the storage capacitor must have sufficiently large overlapped areas, which increase the height of the storage capacitor. High storage capacitors easily slope, and some of them may lean together, resulting in the malfunction of a DRAM cell.
To overcome the slope issue, a carbon or aluminum lattice structure 19 is formed on the top portions of electrodes 17 of storage capacitors of a DRAM cell to prevent the electrodes 17 from sloping as shown in FIG. 1. The top portions of the electrodes 17 formed in the openings of a layer 12 on a substrate 11 are exposed by etching the layer 12. Carbon or aluminum is deposited on the top portions of the electrodes 17, and carbon or aluminum lattice is formed on each top portion. Adjacent lattices connect with each other to form a lattice structure 19, which can hold the top portions of the electrodes 17 at desired positions. However, holding the top portions of the electrodes 17 at fixed positions by a lattice structure 19 cannot prevent the middle portions of the electrodes 17 from being wobbly, and adjacent electrodes may contact each other if the electrodes 17 have high aspect ratios.